| |
Launched in November 1995, the Pentium Pro was the first in the legendary P6 microarchitecture and introduced many advanced new features to x86 processing, such as an on-package L2 cache, out-of-order execution, and RISC style execution units with a CISC front end.
The cache was not part of the processor die itself as the 600nm process (later transistioned to 350nm, with the cache remaining 600nm for 256KiB chips, 350nm for larger cache sizes) could not accomodate this and was instead a seperate die which was then joined early in production, with the chip using dual independant buses, one to provide a full speed connection to the L2 cache, the other to the chipset north bridge.
This gave the chip a large performance boost over the Pentium generation especially in 32-bit code where the P6 architecture excelled, however large die size and low yields made it very expensive, preventing it from becoming popular on the desktop. Instead it most often found a home in 2 or 4 socket workstations and servers.
The Pentium Pro was found in three forms, with the difference being the amount of L2 cache attached, 256KiB, 512KiB or 1MiB.
| Derivative |
Interface |
FSB Frequency |
Clock Frequencies (MHz) |
Technologies |
| 256KiB (600nm) |
Socket 8 |
60MHz |
150 |
Speculative Execution, Superpipelining, On-package L2 cache, Register Renaming, Out-of-Order Execution |
| 256KiB (350nm) |
180 |
| 66MHz |
166, 200 |
| 512KiB |
166, 200 |
| 1MiB |
200 |
Boxed and sealed retail box processor. Purchased from eBay.
|
|