Xeon™

The move of Xeon to the Netburst architecture in May 2001 saw the server and workstation chips drop the Pentium® brand and become a line in its own right.

Foster & Foster MP

Despite this naming change the actual products remained very much related to there desktop counterparts.
The first Xeon chips where based off of the Foster core, which was closely related to the Willamette core Pentium 4's with 256KiB L2 cache, and a effective 400MHz front side bus (4 x 100MHz) for Socket 603 at speeds of 1.4, 1.5 and 1.7GHz with a 2GHz part following in September of the same year.
This worked well as a workstation chip but in a server environment the Cascades-2M core Pentium 3 Xeon could often outperform it.

The Foster core however only worked in two processor configurations. The Foster MP core was launched on March 12th 2002 and not only provided support for four processor systems but also added 512KiB or 1024KiB L3 cache. Foster MP was available at 1.4GHz (512KiB only), 1.5GHz (512KiB or 1024KiB) and 1.6GHz (1024KiB only).
The additional of the L2 cache was necessary as all CPU's within a system shared a single front side bus and therefore this helped reduce the need for the processor to have to query main memory.

Prestonia & Gallatin

Prestonia and Gallatin are to Northwood what Foster and Foster MP are to Willamette.

Launched on February 25th 2002 initial chips were Socket 603 and running on the same 400MHz Front Side Bus as the Foster and at clock speeds of 1.8, 2.0 and 2.2GHz.
Speed bumps followed to 2.4GHz in April and then 2.6 and 2.8GHz in September before the introduction of Socket 604 and the 533MHz FSB (4 x 133) on November 18th.
The move to Socket 604 main purpose was to prevent the insertion of Socket 604 CPU's into Socket 603 boards, the extra pin was a No Connect and was purely for keying, but the 604 chips also had direct access to the thermal diode rather than reading it from an EEPROM surface mounted to the processor packaging.
This in turn allowed for the size of the processor packaging to be reduced.

Picture of side by side Xeon's

Despite these differences a Socket 603 CPU could be fitted to a Socket 604 board, just not visa-versa.
These chips were available up to 3.06GHz and a 3GHz along with trio of Low Voltage chips, 400MHz FSB chips, were added to the line-up, .

Gallatin followed the same idea as Foster MP, remaining a Socket 603 chip on a 400MHz FSB and adding L3 cache to compensate for the additional load on the bus.
The amount of cache however was increased, the base level chips, available from 1.5 to 2.5GHz featured 1MiB of L3 cache, the mid-range at 2.0 to 2.8GHz had 2MiB, and the top end 3GHz chip had a whooping 4MiB.
Later Gallatin cores were also released for two socket systems using Socket 604, with 1MiB chips running at 2.4 - 3.2GHz and a 2MiB 3.2GHz part, all using a 533MHz FSB.

Nocona, Irwindale, Cranford & Potomac

Once again the Nocona, Irwindale, Cranford and Potomac are very closely related to there Pentium 4 equivalent, this time the Prescott.
The Nocona was introduced first, on June 28th 2004, at speeds from 2.8 - 3.6GHz. This remained Socket 604 and pushed the front side bus up to 800MHz (4 x 200). Like the Prescott there were issues with heat, but unlike the Prescott the EM64T instructions were enabled from the outset, and performance was at least equivalent to a similarly clocked Prestonia thanks to the faster bus speed.
A 2.8GHz Nocona Low Voltage was also available with a TDP of 55w.

Irwindale followed in February 2005 at speeds of 3.0 - 3.6GHz and were based on the Prescott-2M core, adding EIST and XD-bit support along with increasing the L2 cache to 2MiB. EIST helped decrease power consumption at idle while the extra cache helped performance. Finally, in September 2.8 and 3.8GHz chips were added to the lineup, along with Medium Voltage and Low Voltage chips.

On March 29th 2005 both the Cranford and Potomac launched Xeon MP's launched simulatanously, for the first time on Socket 604 as the front side bus of both parts was increased to 667MHz (4 x 166) and therefore they would not function in Socket 603 boards.
Both were based on the same underlying architecture as the Nocona core, including the 1MiB L2 cache as opposed to the 2MiB of the Irwindale, with XD-bit support added.
The Cranford featured no other enhancements, but the Potomac featured L3 cache, 4MiB on the 2.83GHz part and 8MiB on the 3.0 and 3.16GHz parts.

Archived Xeon™ 3.4GHz

Production Nocona 3.4GHz. Pulled from a dead server.
Untested.

Archived Xeon™ MP 3.66GHz

Engineering sample Cranford 3.66GHz. Pulled from a dead server.
Untested.