Celeron® D

The Celeron D name came into existance to differentiate between processors based on the Northwood and the new Prescott core. This was necessary as the 90nm Prescott core had different power requirements and therefore wouldn't work in the majority of Socket 478 motherboards without at least a BIOS update.
Unlike for Pentium's, the D did not stand for dual core, and was a slightly confusing choice of letters.

The cache size was slashed from 1MiB to 256KiB, allowing flawed Precott chips to have faulty cache fused off and be used as Celeron D's as was seen with previous generations of Celeron.
Since the Netburst architecture was somewhat cache dependant this meant performance took a dive, and the decision to stick to a 533MHz front side bus as opposed to the 800MHz of the Pentium 4 didn't help matters either.

Initially Celeron D was launched only on Socket 478, in June 2004, with LGA775 arriving on September 22nd of the same year. Following the convention of the LGA775 Pentium 4's, all Celeron D's, both S478 and LGA775 were assigned model numbers as opposed to clock speeds and made up the 300-series.
LGA775 chips however were available in two forms, the Prescott-J core, adding XD-bit support and the EM64T version of the core which featured 64-bit support for the first time on a Celeron.

May 28th 2006 saw the launch of the Cedar Mill based Celeron D. These chips were based on the 65nm process and increased L2 cache to 512KiB but they were still far behind the equivilant Pentium 4. These chips supported XD-bit and EM64T.

Archived Celeron® D's

There are presently no Celeron D's in the CPU archive.